IEEE 35th Asian Test Symposium (ATS 2026)

 

Dear Colleagues and Researchers,

 

The ATS 2026 Organizing Committee cordially invites you to submit your original, unpublished papers to the IEEE 35th Asian Test Symposium (ATS 2026).

 

As a premier international forum in the field of electronics testing, ATS 2026 serves as a pivotal platform for academic researchers and industry professionals from around the globe to share groundbreaking ideas and present the latest research findings.

 

Call for Submissions

We invite submissions covering all aspects of system, module, and device testing, as well as broader test technologies. Topics of interest include, but are not limited to:

 

• AI test and Test for AI
• Analog/Mixed-Signal Test
• Automatic Test Pattern Generation (ATPG)
• Built-In Self-Test (BIST)
• Design for Testability (DFT)
• Fault Diagnosis and Failure Analysis
• Machine Learning in Test
• Memory Test, Diagnosis, and Repair
• Hardware Oriented Security and Trust
• SiP, Chiplet, 2.5D and 3D IC Test
• Yield Analysis, Learning, and Enhancement

(For a comprehensive list of topics, please visit our website https://www.ats2026.tw/ )

 

Submission Guidelines:

• Submissions must be made electronically via PDF manuscripts only.
• Papers must not exceed 6 pages in standard IEEE 2-column format (including abstract, figures, tables, and bibliography).
• Accepted papers will be submitted for inclusion into IEEE Xplore.
• Note: At least one author registration (full rate) and attendance at the conference is required for each accepted paper to make the presentation.

 

Important Dates:

• Paper Submission Deadline: June 6, 2026 (23:59 AoE, Anywhere on Earth)
• Notification of Acceptance: September 14, 2026
• Camera-Ready Manuscript: October 13, 2026

 

Learn More about the Program: For complete submission guidelines, online submission portals, and registration updates, please visit: https://www.ats2026.tw/

 

Conference Contact Email:
Name: Mr. Yung-Ming Chiu
ATS 2026 Organizing Committee Email: pobsadue@poetry-life.com

 

We look forward to receiving your contributions and welcoming you to Kaohsiung!

 

The ATS 2026 Organizing Committee invites original, unpublished paper submissions on the topics listed below. Regular paper submissions should be made electronically by PDF manuscripts only, not exceeding 6 pages in IEEE 2-column format (including abstract, figures, tables, and bibliography). A submission will be considered evidence that upon acceptance, at least one author will attend the conference to make the presentation. Authors of accepted papers are responsible for preparing the final manuscripts in time to be included in the electronic proceedings. Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore's scope and quality requirements. At least one author registration (full rate) to the conference is required for each accepted paper. More information is available from the following link: Submission Guidelines.

 

AI test and Test for AI

Analog/Mixed-Signal Test

ATE Design

Automatic Test Pattern Generation (ATPG)

Autonomous Testing

Board-Level Testing and Diagnosis

Boundary Scan Test

Built-In Self-Test (BIST)

CPU/GPU Test

Connectivity Testing

Defect-Based Test

Delay and Performance Test

Dependability and Functional Safety

Design Verification, Validation, and Debug

Design for Testability (DFT)

Diagnosis and Silicon Debug

Fault Diagnosis and Failure Analysis

Fault Modeling and Simulation

Fault Tolerance

Hardware Oriented Security and Trust

High-Speed I/O Test

Heterogeneous Testing

Low-Power IC Test

Machine Learning in Test

Memory Test, Diagnosis, and Repair

Multi-/Many-core Processor Test

Online Test

On-Chip Measurement

Power/Thermal/Reliability Issues in Test

Reconfigurable System Test

Reliability and Testing for Emerging/Approximate/Quantum Computing

RF Test

Safety and Test for Automotive ICs

Self-Repair

SiP, Chiplet, 2.5D and 3D IC Test

Software Test and Reliability

Standards in Test

System-on-Chip Test

Test Compression

Test Economics

Test Quality

Test Synthesis

Test for Biomedical Circuits and Systems

Test for MEMS and Microfluidic Systems

Test for Nanoscale Devices and Emerging Technologies

Test for Reversible and Quantum Circuits

Test for Sensors and IoT

Yield Analysis, Learning, and Enhancement